On the implementation of broadcast, scatter and gather in a heterogeneous architecture

摘要

This paper considers the implementation and evaluation of broadcast, scatter and gather communication operations in heterogeneous machines organized as a Hierarchy of Processor-And-Memory (HPAM). The top levels of the hierarchy consist of a small number of fast processors, whereas the bottom levels consist of a large number of slow processors. Each HPAM level consists of a homogeneous processor mesh.