Time Warp has evolved to a common technique for distributed simulation. Speedup in Time Warp simulation systems mainly depends on two overhead factors: first, the load on the simulators has to be well balanced and second, communication and rollbacks have to be kept to a minimum. Both of these factors are influenced by the partitioning of the simulated system. In this paper, we focus on various static partitioning schemes used to partition digital circuits for distributed simulation.
A new hierarchical partitioning approach is presented, compared and rated with other partitioning schemes by evaluating benchmark circuits. Partitioning is done in two steps: a fine grained clustering step based on corollas and a coarse grained step forming partitions using the connectivity matrix. The corolla approach yields very good partitioning results even for a large number of partitions. The achieved speedups are almost linear (up to 12 partitions for larger circuits), as long as the partition sizes arelarge enough so that communication between the simulators is not a bottleneck. The results reveal the great impact of partitioning on the acceleration of distributed logic simulation and show the effectiveness of the presented corolla partitioning scheme.
Time Warp已发展成为一种用于分布式仿真的通用技术。时间扭曲仿真系统的加速主要取决于两个开销因素:首先,必须很好地平衡模拟器上的负载;其次,必须将通信和回滚保持在最低水平。这两个因素均受模拟系统分区的影响。在本文中,我们重点介绍用于对数字电路进行分区以进行分布式仿真的各种静态分区方案。 P> 通过评估基准电路,提出了一种新的分层划分方法,并与其他划分方案进行了比较和评估。分区分为两个步骤:基于花冠的细粒度聚类步骤和使用连通性矩阵形成分区的粗粒度步骤。即使对于大量分区,花冠方法也可以产生很好的分区结果。只要分区的大小足够大,这样模拟器之间的通信就不会成为瓶颈,则所实现的加速几乎是线性的(对于较大的电路,最多可以有12个分区)。结果揭示了分区对分布式逻辑仿真加速的巨大影响,并证明了所提出的花冠分区方案的有效性。 P>
机译:逻辑电路的模型划分和分布式时空仿真性能
机译:通过微划分加速分布式图形流体模拟
机译:分布式道路网络仿真的空间和图形划分方法评估
机译:行为级分布式逻辑模拟的自动分区
机译:分布式逻辑仿真的优化技术。
机译:用于细胞内分配内体逸出和纳米颗粒的外尿量的逻辑嵌入载体
机译:行为级分布式逻辑仿真的自动分区器
机译:分布式数字逻辑仿真中并行性和死锁的表征