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Estimating testability and coverage distributions of a VLSI circuit from a mixture of discrete and continuous functions

机译：从离散功能和连续功能的混合估算VLSI电路的可测试性和覆盖范围分布

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《ACM/SIGAPP symposium on Applied computing》|1992年|P.433-437|共5页
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H. Farhat; M. Zand; H. Saiedian;
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中图分类计算技术、计算机技术;
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入库时间 2022-08-26 14:45:04

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专利

1. A beta model for estimating the testability and coverage distributions of a VLSI circuit [J] . Farhat H.A., From S.G. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems . 1993,第4期

机译：Beta模型，用于估计VLSI电路的可测试性和覆盖范围分布
2. Vlsi Design of Low Transition Low Power Test Pattern Generator Using Fault Coverage Circuits [J] . B.Praveen Kumar, M.Ravindra Kumar, Rajesh.Ch IOSR Journal of Electronics and Communication Engineering . 2015,第6期

机译：使用故障覆盖电路的低过渡低功耗测试模式发生器的Vlsi设计
3. Dynamic functional testing for VLSI circuits [J] . Maurer P.M. IEEE Design & Test of Computers Magazine . 1990,第6期

机译：VLSI电路的动态功能测试
4. A Functional Coverage Metric for Estimating the Gate-Level Fault Coverage of Functional Tests [C] . Sungchul Park, Li Chen, Praveen K. Parvathala, IEEE International Test Conference . 2006

机译：用于估计功能测试的门级故障覆盖的功能覆盖度量
5. Built-in test design for the efficient testing of VLSI circuits. [D] . Molyneaux, Robert F. 1991

机译：内置测试设计，可有效测试VLSI电路。
6. From Discrete 1 to 10 Towards Continuous 0 to 10: The Continuum Approach to Estimating the Distribution of Happiness in a Nation [O] . Wim Kalmijn -1

机译：从离散1到10到连续0到10：估算一个国家幸福分布的连续方法
7. Low Power High Fault Coverage Test Techniques for Digital VLSI Circuits [O] . Abu Issa Abdallatif S 2009

机译：数字VLsI电路的低功耗高故障覆盖测试技术

Estimating testability and coverage distributions of a VLSI circuit from a mixture of discrete and continuous functions

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