Introducing private caches in bus-based shared memory multiprocessors leads to the cache consistency problem since there may be multiple copies of shared data. However, the ability to snoop on the bus coupled with the fast broadcast capability allows the design of special hardware support for synchronization. We present a new lock-based cache scheme which incorporates synchronization into the cache coherency mechanism. With this scheme high-level synchronization primitives as well as low-level ones can be implemented without excessive overhead. Cost functions for well-known synchronization methods are derived for invalidation schemes, write update schemes, and our lock-based scheme. To accurately predict the performance implications of the new scheme, a new simulation model is developed embodying a widely accepted paradigm of parallel programming. It is shown that our lock-based protocol outperforms existing cache protocols.
在基于总线的共享内存多处理器中引入专用缓存会导致缓存一致性问题,因为共享数据可能存在多个副本。但是,侦听总线的能力与快速广播功能相结合,可以设计用于同步的特殊硬件支持。我们提出了一种新的基于锁的缓存方案,该方案将同步合并到缓存一致性机制中。利用这种方案,可以实现高级同步原语和低级同步原语,而不会产生过多的开销。针对无效方案,写入更新方案和我们的基于锁的方案派生了众所周知的同步方法的成本函数。为了准确地预测新方案对性能的影响,开发了一种新的仿真模型,其中包含了广泛接受的并行编程范例。结果表明,基于锁的协议优于现有的缓存协议。 P>
机译:高速缓存一致性多处理器上用于流水线同步的仿真信号量
机译:缓存相干多处理器上的流水线同步的模拟信号量
机译:EECache:芯片多处理器中节能最后一级缓存的体系结构设计的综合研究
机译:与多处理器缓存同步
机译:芯片多处理器最后一级缓存的时空容量管理。
机译:基于LoRa的异构无线多媒体传感器网络多处理器平台用于环境监测
机译:基于FPGA的多处理器同步窥探缓存的实现和评估
机译:共享内存多处理器的快速同步。同步缓存:忙等待锁定,等待,解锁。睡眠等待和服务请求排队:高争用原子操作的范例