RTG

摘要

The Register level Test Generator (RTG) system is a software tool that automatically develops test patterns to detect all classical single "stuck-at" faults in a digital circuit. In its current state RTG is targeted for boards containing SSI, MSI, and small LSI components. RTG combines an efficient technique for modeling sequential components at the register level with a simple set of testability design rules, and a powerful test generation algorithm. Thus far in its development RTG has been shown to be a useful tool, typically capable of generating a 100% fault coverage test for a 50 IC board in about 30 CPU minutes on a VAX1 11/780 running UNIX.2