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Design and analysis of high power supply rejection CMOS bandgap voltage reference

机译:高电源抑制CMOS带隙基准电压源的设计与分析

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In this paper, a high power supply rejection (PSR) CMOS bandgap circuit applied in RF receiver is presented. A precise and simple PSR model, useful for pencil and paper analysis is hereby developed for the circuit. By analyzing the model, the ways to improve the circuit’s performance of PSR in both low and high frequency domain are presented. The PSR of the circuit can reach 102dB at low frequency and is more than 50dB at high frequency. The proposed CMOS bandgap voltage reference has been implemented in Chartered 0.25-μm N-Well CMOS process.
机译:本文提出了一种应用于射频接收器的高电源抑制(PSR)CMOS带隙电路。因此,为电路开发了一种精确,简单的PSR模型,可用于笔和纸分析。通过分析该模型,提出了在低频和高频域中改善PSR电路性能的方法。电路的PSR在低频时可以达到102dB,而在高频时则超过50dB。拟议的CMOS带隙基准电压源已在特许0.25μmN阱CMOS工艺中实现。

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