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Speech silicon AM: an FPGA-based acoustic modeling pipeline for hidden Markov model based speech recognition

机译:语音芯片AM:基于FPGA的声学建模管道,用于基于隐马尔可夫模型的语音识别

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This paper presents the design of a FPGA-based hardware co-processor, based on the SPHINX 3 speech recognition engine from CMU; capable of performing acoustic modeling (AM) for medium sized vocabularies in real-time. By creating an input-driven pipeline for performing the calculations, we were able to maximize the throughput of the system while simultaneously minimizing the number of pipeline stalls. Use advanced placement techniques enabled post place-and-route speeds even greater than those necessary for real-time operation while operating at maximum workload. Further, by using input control vectors all FSMs were removed from the design, greatly increasing the flexibility of the design. These results combined with the ability to reprogram the system for different recognition tasks serve to create a system capable of in a vast array of environments. Synthesis to both Xilinx Virtex 4 and Spartan 3 FPGAs helps to further characterize the flexibility of the architecture.
机译:本文介绍了基于CMU的SPHINX 3语音识别引擎的,基于FPGA的硬件协处理器的设计。能够针对中型词汇实时执行声学建模(AM)。通过创建用于执行计算的输入驱动的管道,我们能够最大化系统的吞吐量,同时最小化管道停顿的数量。使用先进的放置技术,可以实现最大的工作量,甚至超过实时操作所需的放置和布线速度。此外,通过使用输入控制向量,从设计中删除了所有FSM,从而大大提高了设计的灵活性。这些结果与针对不同识别任务对系统进行重新编程的能力相结合,可以创建一个能够在多种环境中运行的系统。 Xilinx Virtex 4和Spartan 3 FPGA的综合有助于进一步表征架构的灵活性。

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