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A Novel High-Speed Latching Operation Flip-Flop (HLO-FF) Circuit and its Application to a 19 Gb/s Decision Circuit Using 0.2 /spl mu/ Gaas Mesfet

机译：一种新颖的高速锁存运算触发器（HLO-FF）电路及其在使用0.2 / spl mu / Gaas Mesfet的19 Gb / s决策电路中的应用

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《》|2001年|P.193-196|共4页
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Murata; K.; Otsuji; T.;
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中图分类无线电电子学、电信技术;
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1. A novel high-speed latching operation flip-flop (HLO-FF) circuit and its application to a 19-Gb/s decision circuit using a 0.2-/spl mu/m GaAs MESFET [J] . Murata K., Otsuji T. IEEE Journal of Solid-State Circuits . 1995,第10期

机译：一种新颖的高速锁存操作触发器（HLO-FF）电路及其在使用0.2- / spl mu / m GaAs MESFET的19 Gb / s判定电路中的应用
2. A super-dynamic flip-flop circuit for broad-band applications up to 24 Gb/s utilizing production-level 0.2-/spl mu/m GaAs MESFETs [J] . Otsuji T., Yoneyama M. IEEE Journal of Solid-State Circuits . 1997,第9期

机译：利用生产级0.2- / splμ/ m GaAs MESFET的超动态触发器电路，适用于高达24 Gb / s的宽带应用
3. A New Broadband Buffer Circuit Technique and Its Application to a 10-Gbit/s Decision Circuit Using Production-Level 0.5 μm GaAs MESFETs [J] . Miyo MIYASHITA, Naoto ANDOH, Kazuya YAMAMOTO IEICE Transactions on Electronics . 1998,第10期

机译：一种新的宽带缓冲电路技术及其在生产水平0.5μmGaAs MESFET的10Gb决策电路中的应用
4. A Novel High-Speed Latching Operation Flip-Flop (HLO-FF) Circuit and its Application to a 19 Gb/s Decision Circuit Using 0.2 /spl mu/ Gaas Mesfet [C] . Murata K., Otsuji T., Institute of Electric and Electronic Engineer Annual Gallium Arsenide Integrated Circuit Symposium . 2001

机译：一种新的高速锁存操作触发器（HLO-FF）电路及其应用于19 GB / S判定电路的应用，使用0.2 / SPL MU / GAAS MESFET
5. Structural delay testing of latch-based high-speed circuits with time borrowing. [D] . Chung, Kun Young. 2008

机译：带时间借用的基于锁存器的高速电路的结构延迟测试。
6. Conserved behavioral circuits govern high-speed decision-making in wild fish shoals [O] . Andrew M. Hein, Michael A. Gil, Colin R. Twomey, 2018

机译：保守的行为回路控制着野生鱼群的高速决策
7. High-speed dynamic domino circuit implemented with gaas mesfets [O] . Long, Stephen I., Yang, Long 1990

机译：利用Gaas Mesfets实现的高速动态多米诺电路
8. LSI/VLSI (Large Scale Integration/Very Large Scale Integration) Ion Implanted GaAs (Gallium Arsenide) IC Processing. Appendix B. Two-Dimensional Modeling of GaAs MESFET Devices for Integrated High-Speed Logic Circuits [R] . Zucca, R. R., Kirkpatrick, C., Asbeck, P. M., 1984

机译：LsI / VLsI（大规模集成/超大规模集成）离子注入Gaas（砷化镓）IC处理。附录B.用于集成高速逻辑电路的Gaas mEsFET器件的二维建模

A Novel High-Speed Latching Operation Flip-Flop (HLO-FF) Circuit and its Application to a 19 Gb/s Decision Circuit Using 0.2 /spl mu/ Gaas Mesfet

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