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FPGA/DSP-based Configurable Multi-Channel Counter

机译:基于FPGA / DSP的可配置多通道计数器

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In this paper we present a high-performance configurable multi-channel counter, suitable for many scientific applications. The counter array features 64 input channels, is able to acquire incoming events with a pulse rate up to 45 MHz, and provides an integration window (time resolution) down to 24 矛s with a 32 b counting depth. Moreover, the time resolution reaches the value of 8 矛s with a 8 b counting depth and 1 矛s if only 8 channels are used. The collected data are both real-time processed and transmitted over a high-speed IEEE 1394 serial link. The same link is used to remotely set up and control the entire acquisition process, thus giving the system a high degree of flexibility. A small-sized and low-cost implementation is obtained with a Commercial-Off-The-Shelf FPGA/DSP-based single board. A theoretical model that immediately gives the system performance is presented. Finally, we describe the system functional test, the results of which are in good accordance with those derived from the model.
机译:在本文中,我们提出了一种适用于许多科学应用的高性能可配置多通道计数器。计数器阵列具有64个输入通道,能够以高达45 MHz的脉冲频率捕获输入事件,并提供了一个积分窗(时间分辨率),可降低到24秒,计数深度为32 b。此外,如果使用8个通道,则时间分辨率达到8秒的计数值(计数深度为8 b)和1秒的值。收集的数据经过实时处理,并通过高速IEEE 1394串行链路传输。相同的链接用于远程设置和控制整个采集过程,从而为系统提供了高度的灵活性。使用现成的基于FPGA / DSP的单板可实现小型,低成本的实现。提出了立即给出系统性能的理论模型。最后,我们描述了系统功能测试,其结果与从模型得出的结果非常一致。

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