A voltage-dependent switching-time (VDST) model of ferroelectric capacitors for low-voltage FeRAM circuits

摘要

The time required to switch a ferroelectric capacitor from one binary state to the other is strongly related to the magnitude of the applied voltage, especially at voltages well below the power supply. This paper presents a Verilog-A model that accurately predicts the voltage-dependent switching dynamics of various FeRAM technologies. Spectre simulations of low-voltage FeRAM circuits implemented in a 0.35 /spl mu/m CMOS/PZT testchip are in full agreement with our measurement results.