A 0.4 W mixed-signal digital storage oscilloscope processor with Moire prevention, embedded 393 kb RAM and 50 M sample/s 8b ADC

摘要

On a digital storage oscilloscope display, confusing Moire patterns are commonly created by interference of an input signal with the bitmap to which this signal is rendered. The timebase used to zoom through eight decades of selectable time windows aggravates this effect. This dedicated real-time stochastic allocation algorithm, realized on silicon, prevents Moire patterns. A previous single-chip oscilloscope implementation focuses on the analog signal conditioning. This low-power, mixed-signal, one-chip-system digital storage oscilloscope processor (DSOP) performs data acquisition and image rasterizing. For enhanced display confidence, the image processing features a maximum update rate of 50 k waveforms (13 M-pixels) per second into the embedded screen memory bit map, typical of benchtop equipment solutions. The DSOP read-out is at VGA-type 60 frames/s.