Efficient implementation of the two dimensional discrete cosine transform for image coding applications on the DSP96002 processor

摘要

This paper describes the efficient implementation of the 2D DCT for image coding on the DSP96002 processor. The DSP96002 is a general purpose, dual-bus IEEE floating point digital signal processor. Utilizing the DSP96002's inherent parallel processing capabilities, the execution of a 8/spl times/8 fast 2D DCT takes 133 microseconds. The recently proposed 2D and 1D fast DCT algorithms are employed in this implementation. Transform coefficient zigzag ordering, used in the image coding process, executes in less than 28 microseconds. The fast DSP96002 routines, incorporated within this implementation, can be applied in a number of image coding applications such as video and still image coding as well as the newer JPEG still image and MPEG video standards.