Data formats and arithmetic operators for serial/parallel trade-offs in pipelined architectures

摘要

Data formats which can offer a full range of tradeoffs between bit-serial and bit-parallel computation are described. The design of arithmetic operators based on these data formats, especially a digit-serial multiplier is presented. It is shown that these data formats can combine the advantage of limited interconnection and small chip size of bit-serial computation with the advantage of throughput of parallel computation and that they lead to the most efficient pipelined implementation of the desired function.