首页> 外文会议>ISTM/2007;International symposium on test and measurement >Design of the Pipeline Architecture High Speed Data Acquisition System Based on PCI Bus
【24h】

Design of the Pipeline Architecture High Speed Data Acquisition System Based on PCI Bus

机译:基于PCI总线的管道架构高速数据采集系统设计

获取原文

摘要

At present, more of the high speed data acquisition systems based on PCI bus are composed of high speed A/D converters, CPLD or FPGA, FIFO or dual-port SRAM and all-purpose PCI interface, they have bad versatility and flexibility, and cannot bring the performance of PCI bus into play well . Aiming at these insufficiencies, on the base of analysis for the characteristics of pipeline technology, a method for design the pipeline architecture high speed data acquisition system based on PCI bus is discussed. The data acquisition system designed according to this method not only can gain very high data acquisition speed and data transfer speed, but also has good versatility and flexibility.
机译:目前,更多基于PCI总线的高速数据采集系统由高速A / D转换器,CPLD或FPGA,FIFO或双端口SRAM和通用PCI接口组成,它们通用性和灵活性差,并且无法充分发挥PCI总线的性能。针对这些不足,在分析流水线技术特点的基础上,讨论了一种基于PCI总线的流水线架构高速数据采集系统的设计方法。按照这种方法设计的数据采集系统,不仅可以获得很高的数据采集速度和数据传输速度,而且具有很好的通用性和灵活性。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号