STABILITY OF ADVANCED GATE STACK DEVICES

摘要

The stability of poly-Si gated HfO_2 (～ 1.2nm EOT) and Y_2O_3 (～ 3.1 nm EOT) dielectrics was assessed after constant current stressing of the gate. The changes in threshold voltage and transconductance were measured as a function of stress time and stress current over the range of 10~(-3) to 10~5 coulombs of injected charge per square centimeter and stress induced gate leakage and device mobility. With HfO_2, positive shifts in the threshold voltage exhibited a power law dependence. Under high stressing conditions, a power-law dependence of degradation of threshold voltage on the injected charge (～ Q~(0.1)) was observed. Stressing at high current was seen to generate traps. Stressing at low current revealed a saturation of the threshold voltage after modest stressing times. With Y_2O_3, stressed at stressed at similar electric fields, the threshold voltage shifted negatively and the transconductance increased.