FPGA realization of TCM encoder/decoder

摘要

This paper presents the design of a TCM encoder / decoder and implemention on FPGA. FPGA has certain advantages aver ASIC, which attracts its use. The design is implemented using Xilinx SpartanXL S40XLCS280. The motivation for TCM is based on disadvantages of conventional approach of using separate modulation and coding blocks.In power-limited applications, such as Satellite channels, FEC codes can be invoked in order to improve power efficiency at the cost of expanding the bandwidth required. In a bandwidth limited scenario, more bits/symbol can be transmitted but at the cost of increased power requirements. In Trellis coded modulation, the advantages of higher-level modulation are combined with those of FEC, where modulation/encoding and demodulation/FEC decoding form an integral operation. In this paper TCM coding is convolvtional. It has consistently proved more effective and simpler to implement for Gaussian channels. Viterbi decoding algorithm is used in decoding Trellis ― coded modulation, the technique used in Telephone line modems. Viterbi decoding has the advantage that it has a fixed decoding time. It is well suited for hardware implementation.Hardware Description Language used is Xilinx Alliance VHDL.