Photoluminescence Evaluation of Defects Generated during Temperature Ramp-up Process of SiGe-On-Insulator Virtual Substrate Fabrication

摘要

Defects generated during the temperature ramping process were evaluated by photoluminescence (PL) for Si/SiGe/Si-on-insulater structure, which is the typical structure for SiGe-on-insulator (SGOI) virtual substrate fabrication using the Ge condensation by dry oxidation. The free exciton peaks were clearly observed for the as grown wafers and decreased with the increase of annealing temperature. Defect-related PL signals at around 0.82, 0.88, 0.95 and 1.0 Ev were observed and they also varied according to the annealing temperature and SiGe thickness. The defect-related PL signals were also correlated to dislocation-related defects by transmission electron microscopy (TEM).