Common-mode voltage eliminated 2-level PWM inverter based on a cascaded 3-level inverter

摘要

Conventional Pulse Width Modulated (PWM) inverters create common mode voltage with high frequency and dv/dt. Common-mode voltage causes motor shaft voltage, bearing current and electromagnetic interference (EMI) in the induction motor drive system. In this paper, a common-mode voltage eliminated 2-level space vector pulse width modulation scheme based on a cascaded 3-level inverter is presented. When the inverter is controlled by PWM, the common-mode voltage dropped between the neutral point of the motor and the negative terminal of the inverter supply is of alternating nature. In the proposed scheme, inverter voltage vectors having the same common mode voltage are used to generate the PWM signal. This eliminates alternating common-mode voltage and its adverse effects. The scheme is experimentally verified using a 3-level inverter realized by connecting two 2-level inverters in cascade configuration and experimental results are presented to validate the scheme.