RECONFIGURABLE HIGH-LEVEL/LOW-LEVEL FEEDBACK

摘要

The High-Level Scheduler estimates the effect on the final assembly code of an optimization performed at high-level. It permits to automatically control high-level optimizations of the Starcore C-compiler. The estimation involves a model of the target architecture. This paper presents an architecture independent approach to model the low level behaviour of the code using high-level instructions as input. It uses mappings between the high-level instructions and their low-level equivalent or equivalents and information on instruction latency and resource utilization. The transformation's parameters are tuned and returned as feedback to the high-level optimizer.