首页> 外文会议>International conference on computer design: VLSI in computers amp; processors >Accurate Device Modeling Techniques for Efficient Timing Simulation of Integrated Circuits
【24h】

Accurate Device Modeling Techniques for Efficient Timing Simulation of Integrated Circuits

机译:用于集成电路高效时序仿真的精确器件建模技术

获取原文
获取原文并翻译 | 示例

摘要

Accuracy of a transient simulator is critically dependent on its device models, and device model evaluation is often a bottleneck in transient simulation performance. This paper presents comprehensive modeling techniques to compute Fast-to-evaluate and Accurate Simplified Transistor (FAST) models for aggressive MOS technologies. These FAST models accurately capture the static and dynamic behavior of the transistor, and lend themselves to efficient transient simulation. Use of FAST models in timing simulator ACES leads to speedups of 1000x or more over traditional circuit simulators with little or no loss in circuit timing accuracy.
机译:瞬态仿真器的准确性主要取决于其器件模型,而器件模型评估通常是瞬态仿真性能的瓶颈。本文介绍了综合的建模技术,可为激进的MOS技术计算快速评估和准确的简化晶体管(FAST)模型。这些FAST模型可以准确地捕获晶体管的静态和动态行为,并使其有效地进行瞬态仿真。在时序仿真器ACES中使用FAST模型可使传统电路仿真器的速度提高1000倍甚至更多,而电路时序精度几乎没有损失。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号