Quadrature Direct Digital Frequency Synthesizer with High Compression Ratio

摘要

This paper presents a new QDDFS Architecture with high compression ratio, which based on the principles of Non-linear Approach and Trigonometric Approximation. The principles have been analyzed systemically and all the parameters have been optimized. A high compression ratio of 762 at 93.5dBc in a 16bit system. The architecture is realized by Quartus-II at maximum clock frequency of 100MHz. In the end, a proposed architecture is given.