A VLSI Architecture of EBCOT Encoder for JPEG2000

摘要

Embedded Block Coding with Optimized Truncation (EBCOT) algorithm plays a basic and crucial part in JPEG2000 still image compression system. This paper proposes a VLSI architecture of EBCOT, in which a Dynamic Memory Control (DMC) strategy is used to reduce 60% scale of the on-chip wavelet coefficients storage, A parallel architecture is proposed to speed-up the coding process. This architecture can be used as a compact and efficient IP core for JPEG2000 VLSI implementation and various real-time image&video applications.