Implementing Core Tasks of JPEG2000 Encoder on the Dynamically Reconfigurable Processor

摘要

JPEG2000 is a new standard that was developed to take over the widely used JPEG standard. In JPEG2000, the use of wavelet transform and EBCOT greatly improves the quality of the image and the compression ratio. They do, however, take up a lot of processing time. We therefore implemented the processing intensive tasks, namely the reversible discrete wavelet transform (DWT), arithmetic encoding, and a portion of coefficient bit modeling with the reconfigurable processor DRP-1 by NEC Electronics. By using the DRP-1, performance of DWT, arithmetic encoding, and a portion of coefficient bit modeling improved by 6.0,1.6, and 2.0 times over the Texas Instruments DSP TMS320C6713, respectively. These tasks were implemented with very little hardware by time-multiplexing the hardware resources available on the DRP-1. We report on the methods used for the implementation and its results.