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A Hardware Implementation of SOM Neural Network Algorithm

机译:SOM神经网络算法的硬件实现

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Aiming at the real-time problem of SOM(Self-Organizing Feature Map) neural network algorithm based on FPGA(Field Programmable Gate Array), this paper analyzes the parallelism and resource reuse of algorithm process, presents a parallel architecture to implement the algorithm, and gives the hardware design method of the key modules in the architecture. It is simulated by Modelsim and runs on the FPGA development board. The experimental results show that the architecture can ensure the performance of neural network and the circuit has a high processing speed.
机译:针对基于FPGA(现场可编程门阵列)的SOM(自组织特征图)神经网络算法的实时性问题,分析了算法过程的并行性和资源重用性,提出了一种并行架构来实现该算法,并给出了架构中关键模块的硬件设计方法。它由Modelsim仿真,并在FPGA开发板上运行。实验结果表明,该结构可以保证神经网络的性能,电路具有较高的处理速度。

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