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Reversible circuit synthesis Using Binary Decision Diagrams

机译:使用二元决策图的可逆电路综合

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Reversible circuit synthesis is an important branch of low power consumption circuit design. The idea of a logic circuit without loss of information during computation has an impact on power consumption and on the other hand makes the use of classical circuit synthesis algorithms not applicable. In the area of reversible circuit design there is still lack of satisfactory algorithms. During last 15 years many heuristic algorithms have been developed, however, they construct circuit implementations which are far from optimal. In the paper a new implementation of the known transformation based algorithm is presented. The existing transformation based algorithms use truth table during computation. This leads to important memory restrictions on the algorithm. On the other hand any Boolean function can be represented using Binary Decision Diagrams (BBD). This representation is more compact and uses less memory than truth table representation. Presented new implementation of transformation based algorithm can be used for synthesis of much larger reversible functions than for original version of the algorithm.
机译:可逆电路综合是低功耗电路设计的重要分支。逻辑电路在计算过程中不会丢失信息的想法会影响功耗,另一方面,传统电路合成算法的使用也不适用。在可逆电路设计领域,仍然缺乏令人满意的算法。在过去的15年中,已经开发了许多启发式算法,但是,它们构造的电路实现远非最佳。在本文中,提出了一种基于变换的已知算法的新实现。现有的基于变换的算法在计算过程中使用真值表。这导致对该算法的重要内存限制。另一方面,可以使用二进制决策图(BBD)表示任何布尔函数。与真值表表示相比,此表示更紧凑,并且使用的内存更少。提出的基于变换的算法的新实现可用于合成比该算法的原始版本大得多的可逆函数。

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