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A Low-power Oriented Dynamic Hybrid Cache Partitioning for Chip Multi-processor

机译:面向芯片多处理器的面向低功耗的动态混合缓存分区

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As the number of cores on CMP increases, the size of an on-chip cache increases and it consumes more and more power of the whole system. So low-power oriented design has become an inevitable trend. However currently most of the partitioning strategies are aimed at throughput or fairness, ignore the power consumption. In order to reduce system power consumption, a new low-power-oriented hybrid partitioning (LPHP) strategy for shared cache is proposed in this paper. Due to the program locality principle, it uses both private and shared resource-allocation methods to implement the partitioning strategy by combining the two threads whose access appears large difference into one partitioning unit at run-time. Then when running the same application, some of the cache columns can be closed within the performance degradation threshold (PDT).
机译:随着CMP上内核数量的增加,片上高速缓存的大小也会增加,并且会消耗整个系统越来越多的功率。因此,低功耗设计已成为必然趋势。但是,当前大多数分区策略都针对吞吐量或公平性,而忽略了功耗。为了降低系统功耗,提出了一种新的面向共享缓存的低功耗面向混合分区(LPHP)策略。由于程序的局部性原则,它通过在运行时将访问权限差异很大的两个线程组合到一个分区中,从而使用私有和共享资源分配方法来实现分区策略。然后,在运行同一应用程序时,可以在性能降低阈值(PDT)内关闭某些缓存列。

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