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Physical Addressing on Real Hardware in Isabelle/HOL

机译:Isabelle / HOL中实际硬件上的物理寻址

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摘要

Modern computing platforms are inherently complex and diverse: a heterogeneous collection of cores, interconnects, programmable memory translation units, and devices means that there is no single physical address space, and each core or DMA device may see other devices at different physical addresses. This is a problem because correct operation of system software relies on correct configuration of these interconnects, and current operating systems (and associated formal specifications) make assumptions about global physical addresses which do not hold. We present a formal model in Isabelle/HOL to express this complex addressing hardware that captures the intricacies of different real platforms or Systems-on-Chip (SoCs), and demonstrate its expressivity by showing, as an example, the impossibility of correctly configuring a MIPS R4600 TLB as specified in its documentation. Such a model not only facilitates proofs about hardware, but is used to generate correct code at compile time and device configuration at runtime in the Barrelfish research OS.
机译:现代计算平台本质上是复杂且多样化的:内核,互连,可编程存储器转换单元和设备的异构集合意味着没有单个物理地址空间,并且每个内核或DMA设备可能会在不同的物理地址看到其他设备。这是一个问题,因为系统软件的正确操作依赖于这些互连的正确配置,并且当前的操作系统(和相关的正式规范)对不成立的全局物理地址进行了假设。我们在Isabelle / HOL中提供了一个正式模型来表示这种复杂的寻址硬件,该硬件捕获了不同的实际平台或片上系统(SoC)的复杂性,并通过举例说明正确配置配置文件的可能性来展示其表达能力。 MIPS R4600 TLB在其文档中指定。这种模型不仅有助于证明硬件,还可以在Barrelfish研究OS中在编译时生成正确的代码,并在运行时生成设备配置。

著录项

  • 来源
    《Interactive theorem proving》|2018年|1-19|共19页
  • 会议地点 Oxford(GB)
  • 作者单位

    Department of Computer Science, ETH Zurich, Zuerich, Switzerland;

    Department of Computer Science, ETH Zurich, Zuerich, Switzerland;

    Department of Computer Science, ETH Zurich, Zuerich, Switzerland;

    Department of Computer Science, ETH Zurich, Zuerich, Switzerland;

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  • 原文格式 PDF
  • 正文语种 eng
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