New PLL based signal conditioning circuitry for capacitive sensors

摘要

This paper presents a new capacitive signal-conditioning interface, employing a Phase Locked Loop (PLL) circuit. The entire circuit design is based on the principle of capacitance-frequency-voltage conversion. The CD4046 digital phase-locked loop (Fairchild Semiconductor) was used for the circuit implementation since it offers approximately 1% linearity, which is suitable for most applications [1]. The functional sensor material used was Polyvinylidene Fluoride (PVDF) and this was mixed with 7wt.% Ethyl Cellulose and 1wt.% Lecithin. Terpinol-α was used as the solvent to form the thick film paste. The circuit sensitivity has been tested with the developed thick film sensor in terms of output circuit voltage versus capacitance change. It was found that the developed circuit has lower power consumption when compared to standard frequency-to-voltage converter configurations.