Implementation of an MHT-based object detection algorithm on a 2-Dprocessor mesh

摘要

The mapping of multistage hypothesis testing (MHT)-basedalgorithms to two-dimensional mesh architectures is discussed. How theinterprocessor communication overhead varies as a function of thegrain-size of the architecture is discussed. The speedup achievable by aprocessor mesh relative to a single processor is calculated as afunction of the cost of interprocessor communication. It is shown thatthe smaller the mesh grain-size, the greater the speedup of theMHT-based algorithm, even for very expensive interprocessorcommunication costs