Fault-Tolerant Synchronous FSM Network Design for Path Delay Faults

摘要

The use of modern high-speed electronic devices in high-tech industries requires high reliability of these devices. External factors such as radiation, high temperature, etc., often lead to the appearance of socalled soft faults of transient or intermittent. Such faults do not cause irrevocable changes in the equipment, and their manifestation lasts a limited time, not more than one clock cycle as a rule. Nevertheless it can affect the correct operation of the device. The accumulation of even small delays of gates in highspeed circuit along the path from the circuit input to the output can lead to an incorrect output signal. Such faults are called path delay faults. In this paper, we propose a method of fault-tolerant FSM network design for path delay faults, based on the use of a self-checking FSM network and a FSM network that implements the basic functionality without additional properties.