Coding algorithms for network on a chip

摘要

Bose-Chaudhuri-Hocquenghem(BCH) coding based on chip communication network is proposed to achieve low latency and high throughput. The proposed encoding and decoding scheme is applied to Butterfly-fat-tree(BFT) architecture. The proposed design improves error correction as compared to conventional schemes. The throughput of BFT-BCH architecture is increased by 50%. The design decreases the latency of the network on chip by 30%. The total power consumption required to achieve the proposed design is slightly increased by 11%.