Performance modeling of a cache system with three interconnecttechnologies: cyanate ester PCB, chip-on-board and Cu/PI MCM

摘要

To understand the tradeoffs in different interconnecttechnologies, and to investigate the applicability of MCM (multi-chipmodule) technology to high performance computer products, an electricalperformance modeling study on a cache system using three interconnecttechnologies was conducted. The three technologies were a high densitycyanate ester PCB; chip-on-board; and a copper/polyimide MCM withhigh-density connectors. Placements and layouts for the cache system,using three interconnect technologies, have been done. Active buffermodels and interconnect models have been developed. The performancemodeling results, including the interconnect, input/output buffers,critical path delays, and the signal integrity assessment, are presented