A Technique to Linearize LDMOS Power Amplifiers based on Derivative Superposition and Out-of-Band Impedance Optimization

摘要

Derivative Superposition (DS) has been demonstrated in prior work to improve the linearity performance of a LDMOS power amplifier at power levels far from compression. However, we have found that at higher power levels (close to compression), DS was not effective to provide any linearity improvement. We propose a technique that combines DS with second harmonic impedance tuning which is able to give improvement in linearity much closer to compression point, thus facilitating a higher power efficiency of the amplifier for a given application. On wafer measurement on a LDMOS device (3 x 0.8 x 100 μm ) that is optimized with DS and out-of-band impedance termination shows an improvement in linearity up to 4dB back-off from the P1dB compression point.