Hardware Architecture of Improved Tomlinson-Harashima Precoding for Downlink MC-CDMA

机译：下行MC-CDMA的改进Tomlinson-Harashima预编码的硬件架构

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In this paper, Tomlinson-Harashima precoding (THP) algorithm for the downlink of MC-CDMA system, in which multiple-access interference and possible complexity in the mobile terminal are major burdens, is investigated. A new THP based on the minimum mean-s

机译：本文研究了针对MC-CDMA系统下行链路的Tomlinson-Harashima预编码（THP）算法，其中移动终端中的多址干扰和可能的复杂性是主要负担。基于最小均值的新THP

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来源
《Circuits and Systems, (APCCAS), 2006 IEEE Asia Pacific Conference on》|2006年|P.1200-1203|共4页
会议地点 Singapore
作者
Kuang-Hao Lin; Hsin-Lei Lin; Chang; R.C.; Ching-Fen Wu;
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OFDM modulation; channel coding; code division multiple access; least mean squares methods; MC-CDMA; Tomlinson-Harashima precoding; minimum mean-square error; multiple-access interference; orthogonal frequency division multiplexing; zero forcing; MC-CDMA; MMSE; OFDM;

机译：OFDM调制；信道编码；码分多址；最小均方方法MC-CDMA； Tomlinson-Harashima预编码；最小均方误差多址干扰；正交频分复用零强迫MC-CDMA； MMSE;正交频分复用;

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1. 下行多用户MC-CDMA系统中的自适应资源分配 [J] . 王俊波, 陈明, 王江舟东南大学学报（英文版） . 2008,第004期
2. Analysis and Architecture Design of a Downlink $M$-Modification MC-CDMA System Using the Tomlinson–Harashima Precoding Technique [J] . Lin K.-H., Chang R. C.-H., Lin H.-L., IEEE Transactions on Vehicular Technology . 2008,第3期

机译：使用Tomlinson-Harashima预编码技术的下行$ M $-修改MC-CDMA系统的分析和架构设计
3. Power-Efficient Tomlinson-Harashima Precoding for the Downlink of Multi-User MISO Systems [J] . Garcia-Rodriguez A., Masouros C. Communications, IEEE Transactions on . 2014,第6期

机译：多用户MISO系统下行链路的高效Tomlinson-Harashima预编码
4. Interference Optimization for Transmit Power Reduction in Tomlinson-Harashima Precoded MIMO Downlinks [J] . Masouros C. Signal Processing, IEEE Transactions on . 2012,第5期

机译：Tomlinson-Harashima预编码MIMO下行链路中的降低发射功率的干扰优化
5. Hardware Architecture of Improved Tomlinson-Harashima Precoding for Downlink MC-CDMA [C] . Kuang-Hao Lin, Hsin-Lei Lin, Chang R.C., IEEE Asia Pacific Conference on Circuits and Systems . 2006

机译：下行链路MC-CDMA改进Tomlinson-Harashima的硬件架构
6. Semi-blind interference suppression algorithm for a downlink MC-CDMA system that employs space time block code. [D] . Sin, Leon Chun Ho. 2003

机译：用于采用空时分组码的下行链路MC-CDMA系统的半盲干扰抑制算法。
7. Block Diagonal Hybrid Precoding and Power Allocation for QoS-Aware BDMA Downlink Transmissions [O] . Guanchong Niu, Qi Cao, Manon Pun 2020

机译：块对角线混合预编码和功率分配用于QoS感知BDMA下行链路传输
8. Improved Achievable Rates for Regularized Tomlinson-Harashima Precoding in Multiuser MIMO Downlink [O] . Hui, Bing, Mohaisen, Manar, Chang, KyungHi 2011

机译：规则化Tomlinson-Harashima预编码的可实现率提高在多用户mImO下行链路中
9. Cognitive Processing Hardware Elements Reconfigurable Architecture for Improved Soar Execution (RAISE) [R] . Scarpino, M. , Wray, R. 2005

机译：用于改进翱翔执行的认知处理硬件元素可重构架构（RaIsE）

Hardware Architecture of Improved Tomlinson-Harashima Precoding for Downlink MC-CDMA

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