Cost-Effective Hardware Sharing Architectures of Fast 8脳8 and 4脳4 Integer Transforms for H.264/AVC

摘要

In this paper, the novel hardware sharing architectures are proposed for realizations of fast 4times4 and 8times8 forward/inverse integer transforms in the H.264/AVC. Based on matrix factorizations, the cost-effective architectures for fast one-dimensiona