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FPGA developments for the SPARTA project

机译:SPARTA项目的FPGA开发

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The European Southern Observatory (ESO) and Durham University's Centre for Advanced Instrumentation (CfAI) are currently designing a standard next generation Adaptive Optics (AO) Real-Time Control System. This platform, labelled SPARTA 'Standard Platform for Adaptive optics Real-Time Applications' will initially control the AO systems for ESO's 2nd generation VLT instruments, and will scale to implement the initial AO systems for ESO's future 100m telescope OWL. Durham's main task is to develop the Wavefront Sensor (WFS) front end and Statistical Machinery for the SPARTA platform using Field Programmable Gate Arrays (FPGA). SPARTA takes advantage of a FPGA device to alleviate the highly parallel computationally intensive tasks from the system processors, increasing the obtainable control loop frequency and reducing the computational latency in the control system. The WFS pixel stream enters a PMC hosted FPGA card contained within the SPARTA platform via optical fibres carrying the VITA 17.18/10 standard 2.5Gbps~(-1) serial Front Panel Data Port (sFPDP) protocol. Each FPGA board can receive a maximum of 10Gbs~(-1) of data via on-board optical transceivers. The FPGA device reduces WFS frames to gradient vectors before passing the data to the system processors. The FPGA allows the processors to deal with other tasks such as wavefront reconstruction, telemetry and real-time data recording, allowing for more complex adaptive control algorithms to be executed. This paper overviews the SPARTA requirements and current platform architecture, Durham's Wavefront Processor FPGA design and it concludes with a future plan of work.
机译:欧洲南部天文台(ESO)和达勒姆大学高级仪器中心(CfAI)目前正在设计标准的下一代自适应光学(AO)实时控制系统。该平台被标记为SPARTA“自适应光学实时应用标准平台”,最初将控制ESO第二代VLT仪器的AO系统,并将扩展以实施ESO未来的100m望远镜OWL的初始AO系统。 Durham的主要任务是使用现场可编程门阵列(FPGA)为SPARTA平台开发波前传感器(WFS)前端和统计机械。 SPARTA利用FPGA器件来减轻来自系统处理器的高度并行的计算密集型任务,从而增加了可获得的控制环路频率并减少了控制系统中的计算延迟。 WFS像素流通过承载VITA 17.18 / 10标准2.5Gbps〜(-1)串行前面板数据端口(sFPDP)协议的光纤进入SPARTA平台中包含的PMC托管FPGA卡。每个FPGA板通过板载光收发器最多可以接收10Gbs〜(-1)数据。在将数据传递到系统处理器之前,FPGA器件将WFS帧缩减为梯度向量。 FPGA使处理器能够处理其他任务,例如波前重建,遥测和实时数据记录,从而允许执行更复杂的自适应控制算法。本文概述了SPARTA要求和当前平台架构,达勒姆(Durham)的Wavefront处理器FPGA设计,并总结了未来的工作计划。

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