Hardwar compilation using attribute grammars

摘要

Attribute grammars have been used extensively in every phase of traditional compiler construction and, therefore, practical attibute grammar evaluators have been developed to automate the task. The similar task of hardware compilation has not however taken advantage of these developments yet. Previous work has shown that attribute grammars can be effectively adopted to handle high-level hardware synthesis. In this paper, these past results are further elaborated and integrated in the construction of a proptotype for an attribute grammar driven hardware compiler from behavioral descriptions to VHDL. Due to its flexibility and rapid design, such a compiler can be used as a workbench for testing various synthesis algorithms and optimization criteria. This novel approach can be proven valuable for evaluating new algorithms and techniques in the field.