首页> 外文会议>48th annual ACM southeast regional conference 2010 >Improving the Static Real-Time Scheduling on Multicore Processors by Reducing Worst-Case Inter-thread Cache Interferences
【24h】

Improving the Static Real-Time Scheduling on Multicore Processors by Reducing Worst-Case Inter-thread Cache Interferences

机译:通过减少最坏情况的线程间缓存干扰来改善多核处理器上的静态实时调度

获取原文
获取原文并翻译 | 示例

摘要

As well known, knowing the worst-case execution time (WCET of real-time tasks is crucial for schedulability analysis in a real-time system. In a multicore computing environment, however, the inter-thread interferences in the shared resources such as the shared cache can significantly affect the WCET of each real-time task, making the actual (i.e runtime) WCET quite different from the statically estimated WCET obtained before scheduling. In this paper, we present a novel static real-time scheduling approach on multicore platforms based on the WCET of target real-time tasks provided by considering the worst case inter-thread interferences in the shared L2 cache. Furthermore a greedy algorithm is integrated into the static scheduling approaches to generate safe schedules while minimizing the worst-case inter-thread cache interferences and WCET.
机译:众所周知,了解实时工作的最坏情况执行时间(WCET)对于实时系统中的可调度性分析至关重要。但是,在多核计算环境中,共享资源(例如内存)中的线程间干扰共享缓存会显着影响每个实时任务的WCET,从而使实际(即运行时)WCET与调度之前获得的静态估计WCET完全不同,本文提出了一种新颖的多核平台上的静态实时调度方法。通过考虑共享L2缓存中最坏情况下的线程间干扰提供的目标实时任务的WCET,此外,将贪婪算法集成到静态调度方法中以生成安全调度,同时最大程度地减少最坏情况下的线程间缓存干扰和WCET。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号