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A Dolby AC-3/MPEG1 audio decoder core suitable for audio/visualsystem integration

机译:适用于音频/视频系统集成的Dolby AC-3 / MPEG1音频解码器内核

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A synthesizable Dolby AC-3/MPEG1 audio decoder core has beenndeveloped for use in audio/visual system LSIs. In order to optimize thencore both in size and power consumption, it employs a dedicated designnapproach rather than a DSP approach. Moreover, the core is designed tonoperate at 27 MHz, which is slower than reported DSP implementations,nand is useful for integration with digital video decoders. Annexperimental decoder chip has successfully fabricated using a 0.35 umncell-based CMOS technology, to evaluate the AC-3/MPEG1 audio decoderncore. Because the chip integrates a 61 Kbit RAM with the core, it cannachieve 5.1 ch AC-3 decoding by single-chip. The developed and evaluatedndecoder core is utilized in variable digital audio/video system chips,nincluding single-chip DVD A/V decoders
机译:已经开发出可在音频/视频系统LSI中使用的可合成的杜比AC-3 / MPEG1音频解码器内核。为了优化尺寸和功耗的核心,它采用了专用的设计方法而不是DSP方法。此外,该内核的设计工作频率为27 MHz,比报告的DSP实现要慢,并且对与数字视频解码器集成很有用。 Annexperimental解码器芯片已成功使用基于0.35 umncell的CMOS技术制造,以评估AC-3 / MPEG1音频解码器内核。由于该芯片将61 Kbit RAM与内核集成在一起,因此它可以通过单芯片实现5.1 ch AC-3解码。经过开发和评估的解码器内核可用于各种数字音频/视频系统芯片,包括单片DVD A / V解码器

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