EP120: A 0.35μm, 3V/5V, Mixed-Signal/RF BiCMOS Technology

摘要

This paper describes a 0.35um BiCMOS process, the key aspect of which is the range of applications served by the process. To service the varied requirements, the process is designed to support high yielding, high performance active devices, high precision, well-matched passive elements, plus a variety of options such as thick metal, high-Q inductors. The process is also compatible with an existing dual-voltage, CMOS process. The paper describes some novel features such as the NPN collector design, process thermal sequence and presents results from all the devices and a PLL circuit.