首页> 外文会议>The 24th IEEE International Symposium on Field-Programmable Custom Computing Machines >RP-Ring: A Heterogeneous Multi-FPGA Accelerating Solution for N-Body Simulations
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RP-Ring: A Heterogeneous Multi-FPGA Accelerating Solution for N-Body Simulations

机译:RP-Ring:用于N体仿真的异构Multi-FPGA加速解决方案

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We propose an heterogeneous multi-FPGA accelerating solution, which is called as RP-ring (Reconfigurable Processor ring), for direct-summation N-body simulation. In this solution, we try to use existing FPGA boards rather than design new specialized boards to reduce cost. It can be expanded conveniently with any available FPGA board and only requires quite low communication bandwidth between FPGA boards. The communication protocol is simple and can be implemented with limited hardware/software resource. In order to prevent the slowest board from dragging the overall performance down, we build a mathematical model to decompose workload among FPGAs. The model divide workload based on the logic resource, memory access bandwidth and communication bandwidth of each FPGA chip. We apply the solution in astrodynamics simulation and achieve two orders of magnitude speedup compared with CPU implementations.
机译:我们提出了一种异构的多FPGA加速解决方案,称为RP环(可重配置处理器环),用于直接求和N体仿真。在该解决方案中,我们尝试使用现有的FPGA板而不是设计新的专用板以降低成本。它可以通过任何可用的FPGA板方便地扩展,并且仅需要FPGA板之间的通信带宽非常低。通信协议很简单,可以用有限的硬件/软件资源来实现。为了防止最慢的电路板降低整体性能,我们建立了数学模型来分解FPGA之间的工作量。该模型根据每个FPGA芯片的逻辑资源,存储器访问带宽和通信带宽来划分工作负载。我们将该解决方案应用于航天动力学仿真中,与CPU实施相比,实现了两个数量级的加速。

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