Low cost high throughput affine transformation engine using FPGA

摘要

Geometric transformation is widely used in image processing applications especially in the ones in which image registration is required. Electronic image stabilization, super-resolution, sensor fusion can be given as featured example applications requiring a qualitative registration. Affine transformation is a kind of geometric transformation providing sufficient solution for video streams since it covers necessary transformations such as rotation, scaling, shearing, and translation. However this transformation requires enormous matrix operations like matrix multiplications and additions which makes real time hardware implementation a challenging task. In this paper, the methodology of a fully pipelined architecture design by using FPGA is explained to meet the real time requirements of affine transformation for high resolution video streams. A fully pipelined tile based engine was created in order to perform transformation by aiming maximizing throughput. The design was implemented on Altera's Stratix VFPGA as a real-time system that has the capability of processing full HD video streams.