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3-Bit phase shifter at 3–6GHz band for WiFi, LTE and 5G applications

机译:3-6GHz频段的3位移相器,用于WiFi,LTE和5G应用

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摘要

In this paper, we present a novel phase shifter topologies to construct 45°, 90° and 180° phase shifter cells laid-out using 180nm TSMC technology. CMOS switches are used instead of PIN diodes to have advantages of simple control circuit for switching and low power consumption. Operation of the new circuit is based on the phase shifting properties of the symmetrical all-pass LC lattices. It is straight forward to construct phase shifting cells over a wide frequency band, with various angles for multi bit phase array systems. A numerical method is analyzed in MATLAB. Top level design is simulated in CADENCE where actual elements are used from TSMC and inductors are designed in ASITIC tool. To compensate for the insertion loss an LNA for 3-6GHz band is designed and integrated. A phase shift for integrated circuit between 3-6GHz is achieved with maximum 2.2°, 3.2° and 4.3° phase errors and insertion losses are between +1.8~+4.5dB, -0.7~+1.5dB and +0.4~+2dB for 45°, 90° and 180° respectively.
机译:在本文中,我们提出了一种新颖的移相器拓扑结构,以使用180nm TSMC技术构建45°,90°和180°移相器单元。使用CMOS开关代替PIN二极管,具有开关控制电路简单和功耗低的优点。新电路的操作基于对称全通LC晶格的相移特性。直接在宽频带上构造移相单元,对于多位相阵列系统具有各种角度。在MATLAB中分析了一种数值方法。顶级设计是在CADENCE中进行仿真的,其中使用了台积电的实际元件,而电感则是在ASITIC工具中设计的。为了补偿插入损耗,设计并集成了3-6GHz频带的LNA。对于集成电路,相移在3-6GHz之间,最大相位误差为2.2°,3.2°和4.3°,插入损耗在+ 1.8〜+ 4.5dB,-0.7〜+ 1.5dB和+ 0.4〜+ 2dB范围内为45 °,90°和180°。

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