Department of Microelectronics, Institute of Information Science and Technology, Zhengzhou, China;
Department of Microelectronics, Institute of Information Science and Technology, Zhengzhou, China;
Department of Microelectronics, Institute of Information Science and Technology, Zhengzhou, China;
State Key Lab of ASIC and System, Fudan University, Shanghai, China;
Multicore processing; Parallel algorithms; Standards; Ciphers; Micromechanical devices;
机译:面向密码算法的最佳多核处理器设计-以RSA为例
机译:图形处理单元上基于完美哈希的并行多字符串匹配并行算法
机译:椭圆曲线密码学高速处理器并行化研究
机译:多核加密处理器散列计算并行算法的高速实现
机译:用于计算材料处理的复合自适应网格生成,迁移和并行算法。
机译:使用组合组运算的并行点乘法架构用于高速密码应用
机译:椭圆曲线密码学高速处理器的并行化研究