首页> 外文会议>The 2012 System, Software, SoC and Silicon Debug Conference. >Scalable and retargetable debugger architecture for heterogeneous MPSoCs
【24h】

Scalable and retargetable debugger architecture for heterogeneous MPSoCs

机译:适用于异构MPSoC的可扩展和可重定向的调试器体系结构

获取原文
获取原文并翻译 | 示例

摘要

The increasing heterogeneity and parallelism of modern multi-processor systems on chip (MPSoCs) demand the evolution of existing debuggers in order to keep software development feasible. Such evolution will only be granted if upcoming software debuggers address key issues like abstraction, retargetability, scalability and convergence of information from different data sources. This paper presents a novel component-based, tree-aggregated debugger architecture which (i) grants flexibility and retargetability to deal with heterogeneous MPSoCs, and (ii) provides a framework to abstract complex details in order to facilitate debug of concurrency bugs. The debugger architecture is evaluated on an industrial-strength MPSoC virtual platform for mobile computing and next generation wireless communications.
机译:现代多处理器片上系统(MPSoC)日益增加的异构性和并行性要求不断发展的现有调试器,以保持软件开发的可行性。仅当即将到来的软件调试器解决关键问题(如抽象,可重新定向性,可伸缩性和来自不同数据源的信息的融合)时,这种演变才会被批准。本文提出了一种新颖的,基于组件的树状聚合调试器体系结构,该体系结构(i)赋予灵活性和可重定向性以处理异构MPSoC,并且(ii)提供了抽象复杂细节的框架,以便于调试并发错误。该调试器体系结构在用于移动计算和下一代无线通信的工业级MPSoC虚拟平台上进行了评估。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号