16-Kbit SPI Phase Change Memory Chip with ECC Scheme

摘要

A serial peripheral interface (SPI) 16-Kbit phase change memory chip based on 0.13 μm CMOS process is designed. It contains a parallel error correcting code (ECC) circuit, which can correct 2 bits in every 8 bits without clock delay, enabling the write and read operations performed at bus speed. All the data transfers in 8-bit groups and can be read or written with write protection scheme by unlimited cycle, in which address can automatically increase one by one. Simulation results show that the chip can work correctly in SPI mode and with ECC scheme. It is now under testing.