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Design and implementation of the multicore architecture teaching experiment platform

机译:多核架构教学实验平台的设计与实现

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With the continuous improvement of integrated circuit technology, the new low-power, multicore architecture to replace the previous single core processor architecture has become an inevitable trend of development. The emergence of multicore architectures will lead teaching courses face the problem that the experiments contents should be updated. Under such demand, this article reforms the teaching experiments on the computer architecture courses and completes design and implementation of a multicore architecture computer experiment platform based on Tianhe Sunshine development board. This article makes an analysis of Beehive experiment platform which is based on the XUPV5 development board. On this basis, according to Tianhe Sunshine development board's hardware configuration, we design single core processor, DDR controller and the communication module which can exchange information between PC and board, complete the multicore architecture teaching experiment platform based on message passing model. Finally, this article simulates and verifies the multicore architecture platform functionality. The results of the test show that the designed modules achieved their functions.
机译:随着集成电路技术的不断进步,新型的低功耗,多核架构取代了以前的单核处理器架构已成为发展的必然趋势。多核架构的出现将导致教学课程面临实验内容应更新的问题。在这种需求下,本文对计算机架构课程的教学实验进行了改革,并完成了基于天河阳光开发板的多核架构计算机实验平台的设计与实现。本文对基于XUPV5开发板的Beehive实验平台进行了分析。在此基础上,根据天合阳光开发板的硬件配置,设计了单核处理器,DDR控制器和通信模块,可以在PC和板之间交换信息,从而完成了基于消息传递模型的多核架构教学实验平台。最后,本文模拟并验证了多核体系结构平台的功能。测试结果表明,所设计的模块已实现其功能。

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