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Machine-learning-based circuit synthesis

机译:基于机器学习的电路综合

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摘要

Multi-level logic synthesis is a problem of immense practical significance, and is a key to developing circuits that optimize a number of parameters, such as depth, energy dissipation, reliability, etc. The problem can be defined as the task of taking a collection of components from which one wants to synthesize a circuit that optimizes a particular objective function. This problem is computationally hard, and there are very few automated approaches for its solution. To solve this problem we propose an algorithm, called Circuit-Decomposition Engine (CDE), that is based on learning decision trees, and uses a greedy approach for function learning. We empirically demonstrate that CDE, when given a library of different component types, can learn the function of Disjunctive Normal Form (DNF) Boolean representations and synthesize circuit structure using the input library. We compare the structure of the synthesized circuits with that of well-known circuits using a range of circuit similarity metrics.
机译:多级逻辑综合是一个具有巨大实际意义的问题,并且是开发可优化诸如深度,能量耗散,可靠性等多个参数的电路的关键。该问题可定义为采集任务要从中合成最优化特定目标函数的电路的组件。这个问题在计算上很困难,并且几乎没有自动化的解决方案。为了解决此问题,我们提出了一种称为电路分解引擎(CDE)的算法,该算法基于学习决策树,并使用贪婪方法进行函数学习。我们有经验地证明,当给定不同组件类型的库时,CDE可以学习“非正态形式(DNF)”布尔表示形式的功能,并使用输入库来合成电路结构。我们使用一系列电路相似性指标将合成电路的结构与知名电路的结构进行比较。

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