Simulation of a Single Motor of Latch Type Control Element Drive Mechanism forKorean Next Generation Reactor

摘要

During the CEDM performance test for KNGR we find that the sequential motion of latches is important to thernsuccessful operation and that this is governed by the timing sequence of a control system. However timing sequence setuprnneeds mechanical and electrical characteristic that cannot be obtained without test. Moreover, electrical current traces of thernmotor coil from tests give valuable information of the latch mechanical motion and the amount of force necessary to thernsystem operation. However, due to the high cost associated with actual system testing, it is not always feasible to conductrnparametric studies to improve CEDM operation.rnWork has recently been undertaken to formulate a numerical model which effectively simulates operation of thernCEDM latch mechanism. Simulation of the mechanical and electro-magnetic characteristics for KNGR CEDM has beenrnpursued to set the proper timing sequence of CEDM control system that insures the smooth latch operation and to supply thernoptimized current to the motor.rnA latch magnet with a release spring is simulated by a single degree of freedom system in a mechanical sense and arndriving coil with a control system is simulated as R-L circuit in an electrical sense. Two governing equations have beenrnderived for the above systems and the force-magnetic field relation couples these equations. A small Basic language programrnwith Runge-Kutta method is written to solve the coupled differential equation of second order. The coil current and therndisplacement of a magnet have been calculated along the time considered. Calculated result is compared to the CEDMrnperformance test data and gives a good agreement.rnThough concentrating on a single phase of CEDM motor operation, this work exposes many of the essentialrncharacteristics needed to formulate a more comprehensive model of the whole system. Developed program can be applied forrna parametric calculation during a design stage and for performing diagnostic studies on simulated fault condition withoutrnperforming a test.