Scalability issue is playing a very important role for the highly complex processing systems for the future generation of Network-on-Chips (NoCs). A large number of cores are connected to the communication fabric (router based network) using network interfaces inside an NoC. The problem complexity again increases with the increase in numbers of cores and components. Existing solutions can not be easily extended to solve this issue. In this paper, a new multilevel architecture for network on chip (NOC) and its corresponding deterministic routing is presented. This architecture is multilevel with each previous level structure used as a region in next level structure. So, there is a concept of reusing the previous structure. This topology structure gives smaller diameter and constant bisection width compared to mesh-of-tree and diametrical Mesh structure as the number of nodes grows. Mesh -- of-tree and Diametrical Mesh give better performance compared to mesh structure. It is shown that our proposed topology structure gives better performance compared to the earlier methods. It is also proved that the proposed routing algorithm is deadlock free.
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